Tuesday, November 25, 2014

Digest for comp.programming.threads@googlegroups.com - 14 updates in 13 topics

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Ramine <ramine@1.1>: Nov 24 04:09PM -0800

Hello,
 
 
I think i have understood correctly RMO (Relaxed Memory Ordering) of
Sparc RMO and ARM and i have understood correctly TSO (Total Store
Ordering) of x86.. but i have a question please...
 
 
If you have noticed on my previous post about a Seqlock that
was wrote in Java, you will notice that it is using sfences
and lfences to avoid problems with sequential consistency on
RMO (Relaxed Memory Ordering) and TSO (Total Store Ordering),
but i feel sincerely that RMO (Relaxed Memory Ordering) is
really dangerous, cause for example what will happen to this
Seqlock if the call to Spinlock.lock() inside this Seqlock didn't
contain an MFENCE !? this will become a serious bug and this will become
dangerous and fatal.. so this is why i am kind of afraid of RMO (Relaxed
Memory Ordering) cause RMO higher the complexity and this can introduce
easily serious and fatal bugs...
 
So my question is: Why have we choose RMO even though that it is
dangerous ?
 
 
Thank you,
Amine Moulay Ramdane.
Ramine <ramine@1.1>: Nov 24 03:15PM -0800

Hello again,
 
 
This time i am in the process of porting a Java program
of a Seqlock that i have understood completly to Delphi and FreePascal...
 
But i have to validate my reasoning about the sequential consistency
of this Seqlock..
 
Here is the Seqlock:
 
 
---
 
public final class SeqLock {
 
private long counter;
private volatile int mfence;
 
private final ILock spin;
 
public SeqLock() {
this.counter = 0;
this.spin = new AtomicBackoffLock();
// must perform at least one volatile write to conform to JMM
this.mfence = 0;
}
 
@SuppressWarnings("unused")
public long readBegin() {
long ret = counter;
long lfence = mfence; // lfence
return ret;
}
 
@SuppressWarnings("unused")
public boolean readRetry(long v) {
long lfence = mfence; // lfence
return (v & 1) == 1 || counter != v; // v is odd or sequence
number is changed
}
 
public void writeLock() {
spin.lock();
++counter;
mfence = 0; // sfence
}
 
public void writeUnlock() {
mfence = 0; // sfence
counter++;
spin.unlock();
}
 
/**
* assumes only one writer
*/
public void writeBegin() {
++counter;
mfence = 0; // sfence
}
 
/**
* assumes only one writer
*/
public void writeEnd() {
mfence = 0; // sfence
counter++;
}
 
}
 
---
 
 
So notice with me that on RMO (Relaxed Memory Ordering) like on ARM etc.
this algorithm of a Seqlock needs the sfences and a lfences , and notice
that on RMO the spin.lock() and spin.unlock() must contain an mfence to
avoid problems, but on TSO (Total Store Ordering) in x86 architecture i
think this algorithm don't need sfence on the write side , cause in the
writeLock() the loads can not go above the spinlock.lock() and the
stores of counter in writeUnlock() can not go above cause in the TSO the
stores are not reordered with older stores or older loads...
 
I think on TSO that's the same for readBegin(), they don't need
lfence on TSO cause the stores and loads can not be reordered with the
older load of counter inside readBegin(), and on TSO the loads of
counter inside readRetry() can be reordered with older stores, so we
need to maintain the lfence in readRetry().
 
 
Can you tell me if my reasoning is correct ?
 
 
 
Thank you,
Amine Moulay Ramdane.
ckay4ever@gmail.com: Nov 24 10:32AM -0800

On Monday, November 12, 2007 4:37:59 PM UTC-8, David Schwartz wrote:
> looking for:
> http://www.backerstreet.com/rec/rec.htm
 
> DS
 
HOW ABOUT JUST TRY TO ANSWER IT AS BEST AS YOU CAN INSTEAD OF BEING A FUCKIN PUNK ABOUT IT.. Just like you can open up Disk Images/ISO you CAN open a EXE file as well and see the files and data assosiated with the file.
Tom <mail2devnull@web.de>: Nov 24 03:24PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work? or life?
Tom <mail2devnull@web.de>: Nov 24 03:23PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work? or life?
Tom <mail2devnull@web.de>: Nov 24 03:20PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work? or life?
Tom <mail2devnull@web.de>: Nov 24 03:22PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work? or life?
Tom <mail2devnull@web.de>: Nov 24 03:19PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work?
Tom <mail2devnull@web.de>: Nov 24 03:18PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work?
Tom <mail2devnull@web.de>: Nov 24 03:18PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work?
Tom <mail2devnull@web.de>: Nov 24 03:17PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work?
Tom <mail2devnull@web.de>: Nov 24 03:16PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work?
 
On Fri, 21 Nov 2014 13:20:11 -0800
Tom <mail2devnull@web.de>: Nov 24 03:15PM +0100

the only one who responds to your comments or your posts is yourself. Does this tell you anything about the usefulness of your posts? or work?
On Fri, 21 Nov 2014 14:25:16 -0800
Ramine <ramine@1.1> wrote:
Tom <mail2devnull@web.de>: Nov 24 03:13PM +0100

the only one who responds to or comments on your posts is yourself. Does this tell you anything about the usefulness of your posts? or work?
 
On Sat, 22 Nov 2014 18:31:33 -0800
Ramine <ramine@1.1> wrote:
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