wij <wyniijj5@gmail.com>: Jul 07 01:32PM -0700 On Saturday, July 8, 2023 at 12:37:24 AM UTC+8, Öö Tiib wrote: > > Of course, this piece is mostly for demo. > It is unclear what you mean by that example. Yes, majority of software > does not communicate reading text from standard input using C++ streams. Yes, not majority, but not few programs communicate through fd=0,1,2. > > to read an integer from the standard input? I think the answer is 'no way' for > > application developers. > Why you think so? The C++ streams can be and are useful. Just not always. I might understand what you mean. As I know, C++ stream I/O is compatible with C stream I/O. Many system commands rely on it. Applications use it for convention reasons but not limited. Not fit, don't use it. > You mean GNU C++ library implementers? On the contrary ... most contributors > are rather good and well paid C++ developers. They manage to implement > what standard requires and quite well IMHO. Let say "E.3: Use exceptions for error handling only", a section in the link above. The statement is stronger than before. But, what do general people read, while the real meaning keeps changing? (I mis-read the file CppCoreGuidelines and example program) ...So, in the end, I think the meaning of 'error' depends. IMO, error reports (of a function) are just info. for caller to branch execution path. Throwing (setjmp/longjmp) error, in general, will lose the error context. Application will have less confident what is really caught to choose preciser action. The result is larger portion of the program is 'reset'. (By the way, I think error report by errno might not be bad, also practical) |
Bonita Montero <Bonita.Montero@gmail.com>: Jul 07 08:46PM +0200 Am 07.07.2023 um 20:34 schrieb Kalevi Kolttonen: > set of knowledge. It is specialized expert knowlegde > that only a handful of people have. Ordinary folks > never get access to labs like that. LOL |
scott@slp53.sl.home (Scott Lurndal): Jul 07 06:59PM >between parts. So there will be very fast networking between the servers. >Then there are the files and databases involved, and output files. The >design files will be measured in gigabytes, as will the output files, All correct. The output files consist of log files (debug information from the test bench and test driver - when simulating a CPU, the log also contains each disassembled instruction, all input and output registers and any state changed as a result of instruction execution. This state is compared against a golden reference model each instruction. There are also optional 'wave' files, which contain a clock-by-clock list of signal state changes for post-analysis and debugging using visualization tools. Simulating one real-time second of a 2Ghz design results in 2 billion clocks, for which all the signal state data needs to be stored on disk. >everything bottlenecked through one core. >All this is, of course, very expensive. But if it saves a single failed >tape-out and prototype run of the chips, it will pay for itself. Indeed. "There are many clever tricks that are being used to lower costs of designing that chip, but the biggest hinderances to bringing that design to market is the cost of a mask set. On a foundry process node, at 90nm to 45nm, mask sets cost on the order of hundreds of thousands of dollars. At 28nm it moves beyond $1M. With 7nm, the cost increases beyond $10M, and now, as we cross the 3nm barrier, mask sets will begin to push into the $40M range." https://www.semianalysis.com/p/the-dark-side-of-the-semiconductor You don't want to have to spin your design. |
scott@slp53.sl.home (Scott Lurndal): Jul 07 07:03PM >across this RTL: > https://gcc.gnu.org/onlinedocs/gcc-7.1.0/gccint/RTL.html >Does it have anything to do with the RTL you guys use? Completely unrelated. Here's a sample: logic [7:0] smb_ctl; logic [7:0] smb_sta; logic [31:0] grb_rdata; logic csr_inf_rd_err; logic [31:0] elided; always_ff @(posedge cclk or negedge crst_l) begin if (!crst_l) begin smb_re <= 1'b0; smb_we <= 1'b0; csr_blk_rd_en <= 1'b0; csr_blk_wr_en <= 1'b0; end else if (inf_csr_we && (inf_csr_cmd_code == `SMB_CMD_CTL)) begin smb_re <= inf_csr_wdata[`SMB_CTL_RD_START]; smb_we <= inf_csr_wdata[`SMB_CTL_WR_START]; csr_blk_rd_en <= inf_csr_wdata[`SMB_CTL_BLK_RD_EN]; csr_blk_wr_en <= inf_csr_wdata[`SMB_CTL_BLK_WR_EN]; end else begin smb_re <= 1'b0; smb_we <= 1'b0; csr_blk_rd_en <= csr_blk_rd_en; csr_blk_wr_en <= csr_blk_wr_en; end end assign smb_ctl = {4'b0, csr_blk_wr_en, csr_blk_rd_en, 2'b0}; assign smb_sta = {2'b0, csr_inf_rd_err, csr_inf_rd_vld, last_prcl_st[2:0], smb_prcl_err}; // Write Address always_ff @(posedge cclk or negedge crst_l) begin if (!crst_l) begin smb_waddr <= 32'b0; end else if (inf_csr_we) begin if (inf_csr_cmd_code == `SMB_CMD_WADDR0) smb_waddr[7:0] <= inf_csr_wdata; if (inf_csr_cmd_code == `SMB_CMD_WADDR1) smb_waddr[15:8] <= inf_csr_wdata; if (inf_csr_cmd_code == `SMB_CMD_WADDR2) smb_waddr[23:16] <= inf_csr_wdata; if (inf_csr_cmd_code == `SMB_CMD_WADDR3) smb_waddr[31:24] <= inf_csr_wdata; end end |
"Chris M. Thomasson" <chris.m.thomasson.1@gmail.com>: Jul 07 12:25PM -0700 On 7/7/2023 8:30 AM, Bonita Montero wrote: >> serve hundreds of high-end multicore servers performing RTL simulations >> 24x7 using NFS. > I don't believe you at all, that's pure phantasy. Show me your proof that Scott is lying to us all? ;^/ |
"Chris M. Thomasson" <chris.m.thomasson.1@gmail.com>: Jul 07 12:30PM -0700 On 7/7/2023 10:58 AM, Bonita Montero wrote: >> between the servers. > If you would do that with constant I/Os on the data and not in RAM > you would simulate almost nothing. Scott is lying. Humm... Wow, Bonita, wow... ;^o |
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