- Here is a really good news ! - 1 Update
- Moore's Years: 3D chip stacking will take Moore's Law past 2020 - 1 Update
- Wow ! Look at "Samsung", they are really smart ! - 1 Update
- Optane SSDs: 375GB, at surprising speed - 1 Update
- 3D stacked computer chips could make computers 1,000 times faster - 1 Update
- At the limit of Moore's law: scientists develop molecule-sized transistors - 1 Update
- I will give my explanation of Islam and the Koran.. - 1 Update
- Windows Server 2019 Product Scheduled To Arrive This Year - 1 Update
- Is it time for the Pentagon to take UFOs seriously? - 1 Update
- About my scalable algorithms and about PhDs papers and computer science.. - 1 Update
- Read again.. - 1 Update
- Read again about network of SPSC queue to form MPMC - 1 Update
| computer45 <computer45@cyber.com>: Mar 25 09:11PM -0400 Hello, Here is a really good news ! Smaller and faster: The terahertz computer chip is now within reach Following three years of extensive research, physicists have created technology that will enable our computers —- and all optic communication devices —- to run 100 times faster through terahertz microchips. Read more here: https://www.sciencedaily.com/releases/2018/03/180325115835.htm Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 08:58PM -0400 Hello, Read this: Moore's Years: 3D chip stacking will take Moore's Law past 2020 "Similar to Aquasar, the team plans to design microchannels with single-phase liquid and two-phase cooling systems using nano-surfaces that pipe coolants—including water and environmentally-friendly refrigerants—within a few millimeters of the chip to absorb the heat, like a sponge, and draw it away. Once the liquid leaves the circuit in the form of steam, a condenser returns it to a liquid state, where it is then pumped back into the processor, thus completing the cycle. As we will demonstrate with ETH in the Aquasar project, employing microchannels carrying liquid coolants offers a significant advantage in addressing heat-removal challenges, and this should lead to practical 3D systems," said Bruno Michel, manager advanced thermal packaging, IBM Research - Zurich." Read more here: https://phys.org/news/2010-03-years-3d-chip-stacking-law.html Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 07:30PM -0400 Hello.... Wow ! Look at "Samsung", they are really smart ! Samsung preps for Z-SSD smackdown on Intel Optane drives February reveal for wannabe XPoint killer Samsung is launching its ambitious supercharged NAND Z-SSD in competition with Intel's P4800X Optane drive. Specs for the SZ985 Z-NAND drive were revealed in November, displaying close-to-Optane performance, slightly lower latency, faster read/write bandwidth and random read but lower random write IOPS. Read more here: https://www.theregister.co.uk/2018/01/30/samsung_launching_zssd_attack_on_intel_optane_drives/ Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 07:03PM -0400 Hello, Read this: Optane SSDs: 375GB, at surprising speed Intel says the SSD is built with 3D Xpoint media, plus its own memory, controllers, interconnect IP and Intel software Chipzilla want us thinking about queue depth and latency, not just raw IOPS Optane SSDs can provide DRAM-like performance, it says, in select applications, such as ones with matrix multiplication with optimised data locality. Chipzilla's keen to point out Optane will be cheaper than DRAM, too. Read more here: https://www.theregister.co.uk/2017/03/19/optane_ssd_released/ Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 06:37PM -0400 Hello.... 3D stacked computer chips could make computers 1,000 times faster "Ultimately, the Stanford team built a system that stacks memory and processing power in the same unit, with tiny wires connecting the two. The architecture can produce lightning-fast computing speeds up to 1,000 times faster than would otherwise be possible." Read more here: https://www.zmescience.com/research/technology/3d-stacked-computer-chips-43243/ Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 06:30PM -0400 Hello.... Look at this transistor of 0.167nm wide or 42 times smaller than the very smallest circuits currently possible. At the limit of Moore's law: scientists develop molecule-sized transistors Read more here: https://www.theguardian.com/technology/2015/jul/21/limit-law-scientists-molecule-sized-transistors-atoms-chips Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 04:25PM -0400 Hello.... I will give my explanation of Islam and the Koran.. The interpretation of ISIS is that the Koran is the words of Allah, but this is false, this is not the correct interpretation, because the truth is that prophet Mohamed was enhanced by the extraterrestrial that is called archangel Gabriel to be able to write the Koran, so from this you can understand that the Koran can contain many "errors", because it was written by a human that we call prophet Mohamed that was enhanced by an "extraterrestrial", but you have to be aware that those extraterrestrials want from us to believe and to follow "superior" morality, those extraterrestrials have only somewhat "enhanced" prophet Mohamed(asw) to be able to write the Koran. This is the right interpretation, it means that archangel Gabriel is "only" an "extraterrestrial", he is an extraterrestrial like those on the following video: Is it time for the Pentagon to take UFOs seriously? Look at this video: http://video.foxnews.com/v/5757403109001/ Former CIA Agent on his Deathbed Reveals Alien & UFO TRUTH Look at this video: https://www.youtube.com/watch?v=kF8_KPV3XPY&t=6s So i think extraterrestrials do exist and they have enhanced the human that we call prophet Mohamed to be able for him to write the Koran. Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 04:15PM -0400 Hello, Read this: Windows Server 2019 Product Scheduled To Arrive This Year Read more here: https://redmondmag.com/articles/2018/03/20/windows-server-2019-arriving-2h-2018.aspx Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 03:31PM -0400 Hello.... Is it time for the Pentagon to take UFOs seriously? Look at this video: http://video.foxnews.com/v/5757403109001/ Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 03:03PM -0400 Hello... Read this: About my scalable algorithms and about PhDs papers and computer science.. Look at This PhD paper of a Scalable Concurrent Priority Queue Algorithms: http://people.csail.mit.edu/shanir/publications/SZ-priority.pdf This queue is "not" bound, and i think it uses a mechanism such as an elimination array.. And look at this one of a PhD paper called: Using Elimination to Implement Scalable and Lock-Free FIFO Queues : http://www.cs.tau.ac.il/~shanir/nir-pubs-web/Papers/SPAA2005.pdf I think it is not good or perfect because it uses an elimination array, so when there is no contention or no elimination it doesn't scale. Also about network of SPSC queues to form MPMC, read here: https://books.google.ca/books?id=jZG_DQAAQBAJ&pg=PA276&lpg=PA276&dq=SPSC+and+queue+and+MPMC&source=bl&ots=KwfRYpYWW3&sig=GYE7Sn7ZlhNsJISvTjV4bXnjvDc&hl=en&sa=X&ved=0ahUKEwia4fKKjojaAhUCuVkKHZnbBvMQ6AEIjgEwCQ#v=onepage&q=SPSC%20and%20queue%20and%20MPMC&f=false As you have noticed a matrix of (N-1)*(N-1) SPSC queues is needed to compose an MPMC queue , and strict FIFO order can be broken in it, this is not good, this is why i said also: Other than the strict FIFO order that can be broken, here is another problem with the distributed network of SPSC queues, here it is: -- 5. finally, SPSC may not be a good point for massive ITC(inter-thread communication):. Because the space complexity goes in O(N^2), N is the number of threads. It is not rare to see a server with 1k or 2k hardware threads. And "many core" is the final destination of CPU from current sight. --- Read all the following webpage and the responses to it to understand: https://www.infoq.com/articles/High-Performance-Java-Inter-Thread-Communications But my fully scalable FIFO queue that i have invented has completely "revolutionized" computer science, because it is the "perfect" scalable FIFO queue that is fully scalable even if there is no contention, I have implemented three versions of my scalable FIFO queue, here they are: 1- A fully scalable FIFO queue that is bound and that is not blocking on the producer side and that is blocking on the consumer side. 2- A fully scalable FIFO queue that is unbound and that is not blocking on the producer side and that is blocking on the consumer side. 3- A fully scalable FIFO queue that is bound and that is blocking on the producer side and that is blocking on the consumer side. And i have also invented a fully scalable Threadpool. I will sell them to Embarcadero and to other software companies such as Microsoft and Google etc. Also i will sell them to CAE here, because they need to scale more to many many cores, read here to know about this company: https://www.cray.com/blog/extreme-scaling-in-cae-applications/ Here is CAE company: http://www.cae.com/ And i have also invented a fully scalable reference counting with efficient support for weak references, here it is: https://sites.google.com/site/aminer68/scalable-reference-counting-with-efficient-support-for-weak-references Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 02:47PM -0400 Hello, Read this: Read again about network of SPSC queues to form MPMC: https://books.google.ca/books?id=jZG_DQAAQBAJ&pg=PA276&lpg=PA276&dq=SPSC+and+queue+and+MPMC&source=bl&ots=KwfRYpYWW3&sig=GYE7Sn7ZlhNsJISvTjV4bXnjvDc&hl=en&sa=X&ved=0ahUKEwia4fKKjojaAhUCuVkKHZnbBvMQ6AEIjgEwCQ#v=onepage&q=SPSC%20and%20queue%20and%20MPMC&f=false As you have noticed a matrix of (N-1)*(N-1) SPSC queues is needed to compose an MPMC queue , and strict FIFO order can be broken in it, this is not good, this is why said also: Other than the strict FIFO order that can be broken, here is another problem with the distributed network of SPSC queues, here it is: -- 5. finally, SPSC may not be a good point for massive ITC(inter-thread communication):. Because the space complexity goes in O(N^2), N is the number of threads. It is not rare to see a server with 1k or 2k hardware threads. And "many core" is the final destination of CPU from current sight. --- Read all the following webpage and the responses to it to understand: https://www.infoq.com/articles/High-Performance-Java-Inter-Thread-Communications So i think my scalable FIFO queue algorithm and its implementation is an invention and it is still useful. Thank you, Amine Moulay Ramdane. |
| computer45 <computer45@cyber.com>: Mar 25 02:45PM -0400 Hello, Read again about network of SPSC queue to form MPMC: https://books.google.ca/books?id=jZG_DQAAQBAJ&pg=PA276&lpg=PA276&dq=SPSC+and+queue+and+MPMC&source=bl&ots=KwfRYpYWW3&sig=GYE7Sn7ZlhNsJISvTjV4bXnjvDc&hl=en&sa=X&ved=0ahUKEwia4fKKjojaAhUCuVkKHZnbBvMQ6AEIjgEwCQ#v=onepage&q=SPSC%20and%20queue%20and%20MPMC&f=false As you have noticed a matrix of (N-1)*(N-1) SPSC queues is needed to compose an MPMC queue , and strict FIFO order can be broken in it, this is not good, this is why said also: Other than the strict FIFO order that can be broken, here is another problem with the distributed network of SPSC queues, here it is: -- 5. finally, SPSC may not be a good point for massive ITC(inter-thread communication):. Because the space complexity goes in O(N^2), N is the number of threads. It is not rare to see a server with 1k or 2k hardware threads. And "many core" is the final destination of CPU from current sight. --- Read all the following webpage and the responses to it to understand: https://www.infoq.com/articles/High-Performance-Java-Inter-Thread-Communications So i think my scalable FIFO queue algorithm and its implementation is an invention and it is still useful. Thank you, Amine Moulay Ramdane. |
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