Digest for comp.lang.c++@googlegroups.com - 3 updates in 1 topic

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• neos - 3 Updates

neos

scott@slp53.sl.home (Scott Lurndal): May 10 06:59PM >> Then you'd use an inline-function that either uses this intrinsic >> as with conditional compilation or manual count the bits.   >Here's an example of what I mean for popcnt and MSVC++:   Which is exactly what __builtin_popcount does. If the target platform has the instruction, it is generated, otherwise the compiler generates the appropriate code to perform the functionality. The programmer will get optimal results regardless of the target platform without ugly conditional compilation.     Now, with respect to your assertion that LL/SC type sequences are amenable to being implemented via compiler intrinsics. While it may be true for very simplistic usage models (i.e. a "spin-lock" intrinsic that acquires a spinlock (where the entire LL/SC sequence is generated by that single intrinsic)); but it gets more painful if the load linked (ARM64 load exclusive) and store conditional (ARM64 store exclusive) are made available as individual intrinsics since the code sequence between the LDEX and STREX must not, for example, include stores for proper operations.   http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/CJAGCFAF.html

Bonita Montero <Bonita.Montero@gmail.com>: May 10 09:28PM +0200 > And of course using the preprocessor like that is so much cleaner, > so friendlier on the eye then my method of mixing programming > languages in the same source file. </snigger>   The idea you suppose is degrees harder to read.

Bonita Montero <Bonita.Montero@gmail.com>: May 10 09:30PM +0200 > (ARM64 store exclusive) are made available as individual intrinsics > since the code sequence between the LDEX and STREX must not, for > example, include stores for proper operations.   Then the code around this intrinsics has to be suitable.

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