Tuesday, May 7, 2019

Digest for comp.programming.threads@googlegroups.com - 4 updates in 4 topics

Horizon68 <horizon@horizon.com>: May 06 03:12PM -0700

Hello..
 
 
 
I think X86 CPUs are also the future, here is why:
 
 
The final ISA showdown: Is ARM, x86, or MIPS intrinsically more power
efficient?
 
The RISC vs. CISC argument should've passed into history a long time
ago. It may still have some relevance in the microcontroller realm, but
has nothing useful to contribute to the modern era. An x86 chip can be
more power efficient than an ARM processor, or vice versa, but it'll be
the result of other factors — not whether it's x86 or ARM.
 
 
Read more here:
 
https://www.extremetech.com/extreme/188396-the-final-isa-showdown-is-arm-x86-or-mips-intrinsically-more-power-efficient
 
 
 
Thank you,
Amine Moulay Ramdane.
Horizon68 <horizon@horizon.com>: May 06 12:17PM -0700

Hello..
 
 
Intel demos first Lakefield chip design using its 3D stacking architecture
 
The Foveros era at Intel is approaching
 
Lakefield will specialize in lower-power devices with unique hardware
constraints, including foldable phones and tablets, drones, smart home
devices, and other gadgets that require a tiny, all-in-one chip.
 
 
Read more here:
 
https://www.theverge.com/2019/1/7/18173001/intel-lakefield-foveros-3d-chip-stacking-soc-design-ces-2019
 
 
Thank you,
Amine Moulay Ramdane.
Horizon68 <horizon@horizon.com>: May 06 11:48AM -0700

Hello..
 
 
Intel's Plan to Defeat Qualcomm in Laptops
 
Read more here:
 
https://www.fool.com/investing/2019/01/23/intels-plan-to-defeat-qualcomm-in-laptops.aspx
 
 
 
Thank you,
Amine Moulay Ramdane.
Horizon68 <horizon@horizon.com>: May 06 08:28AM -0700

Hello...
 
 
About scalability of my efficient Threadpool engine with priorities that
scales very well..
 
I have to explain something important about my efficient Threadpool
engine with priorities that scales very well:
 
In NUMA enabled systems all memory operations require snooping across
all CPU sockets to keep cache data coherent. In other words, before data
is retrieved from RAM snooping operation will check cache content of
local and remote CPUs to find the copy of this data.
 
In Haswell CPUs there is the following more powerful snooping mode:
 
Cluster-on-Die (COD) snooping mode is ideal for highly NUMA optimized
workloads. Compared to two previous modes where snoops are simply
broadcasted the COD will first snoop the directory cache and then the
home agent.
 
With Cluster on Die snooping mode each Memory controller now serves only
half of the memory access requests thus increasing memory bandwidth and
reducing the memory access latency. And obviously two memory controllers
can serve twice as much memory operations.
 
So you have to understand that my efficient Threadpool engine with
priorities that scales very well is only sharing some variables across
cores on the producers side, so i think it will scale well
with Cluster-on-Die (COD) snooping mode.
 
 
You can download my efficient Threadpool engine with priorities that
scales very well from:
 
https://sites.google.com/site/scalable68/an-efficient-threadpool-engine-with-priorities-that-scales-very-well
 
 
I have also implemented a powerful scalable ParallelFor() in it.
 
 
Thank you,
Amine Moulay Ramdane.
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